Ahmad Zarkasi, Aciek Ida Wuryandari, Multilayer processing architecture of RAM based neural network with memory optimization for navigation system

Zarkasi, Ahmad (2013) Ahmad Zarkasi, Aciek Ida Wuryandari, Multilayer processing architecture of RAM based neural network with memory optimization for navigation system. In: Rural Information & Communication Technology and Electric-Vehicle Technology (rICT & ICeV-T), 2013 Joint International Conference, 26-28 November 2013, Bandung-Indonesia.

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Abstract

Robots also have been trusted to help human to complete difficult jobs, for example, finding for the earthquake, a fire, or a sinking ship victims. The robot must be reliable, clever and moving automatically. The aim of this study is to develop and apply the application of artificial RAM-based neural networks (WNNs) on a mobile robot using a multilayer processing architecture with memory optimizations on to address and input pattern, so that producing smart navigation model which it has a simpler computational load and faster execution time. The gained result from the first study was the percentage of memory optimization in the amount of 50%. This result obtained from the formerly RAM using 8 bit data width has been optimized to 4 bits. Both of the percentage of data optimization pattern is 93.75%. This percentage is obtained from the optimization pattern (pattern taken is 4 bits MSB), each 1 bit data can handle 15 unseen patterns.

Item Type: Conference or Workshop Item (Paper)
Subjects: T Technology > TA Engineering (General). Civil engineering (General) > TA174.A385 Engineering design--Data processing. Manufacturing processes--Data processing. Computer integrated manufacturing systems. Manufacturing processes--Automation. CAD/CAM systems.
Divisions: 09-Faculty of Computer Science > 57201-Information Systems (S1)
Depositing User: Ahmad Zarkasi
Date Deposited: 28 Nov 2019 11:35
Last Modified: 28 Nov 2019 11:35
URI: http://repository.unsri.ac.id/id/eprint/19065

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